Field effect transistors (FETs) and especially complementary metal-oxide-semiconductor (CMOS) field effect transistors (collectively “MOSFETs”) are much used in complex integrated circuits (ICs). It will be understood that the abbreviations MOS, CMOS and MOSFET and the words for which they stand are used in conjunction with devices that employ other types of conductors and dielectrics besides metals and oxides. Accordingly, the terms MOSFET, MOS and CMOS and the words for which they stand, as used herein, are not intended to be limited merely to structures and methods employing metal conductors and oxide dielectrics but apply to devices, ICs and processes therefore that employ any form or composition of conductor and any form or composition of dielectric in conjunction with a semiconductor substrate, including and not limited to substrates that are single crystal or poly-crystalline or thin film or semiconductor-on-insulator or combinations thereof, collectively referred to herein as a “semiconductor substrate.” The term “semiconductor” is abbreviated as “SC.”
Because of the great functional complexity that can be achieved using MOSFETs, especially CMOS devices, the processes for manufacturing such devices and ICs are often highly optimized so as to maximize the manufacturing yield and minimize the manufacturing cost. Manufacturing steps that are not essential for construction of ICs based on MOSFETS and CMOS devices are usually eliminated or deemed “non-standard”. Manufacturing flexibility is sacrificed in order to optimize the manufacturing process flow and minimize the manufacturing cost of such ICs. While such tradeoffs are desirable for efficient manufacture of ICs that employ MOSFETs and/or CMOS devices, they can become a significant handicap when the need arises to incorporate other types of devices, as for example and not limited to, bipolar transistors in the same ICs. Process parameters that are optimized for production of MOSFETs and/or CMOS devices may be, for example, ill-suited to manufacture of bipolar transistors of the desired properties on the same semiconductor substrate. The problem may be overcome by incorporating additional or modified process steps particularly adapted to form the desired bipolar transistors into the basic MOSFET or CMOS manufacturing flow. However, such additional or modified process steps undesirably add cost and complexity to the manufacturing process, and if possible should be avoided. Accordingly, there is an ongoing need to provide improved fabrication methods and structures for semiconductor devices and ICs capable of providing bipolar transistors and other non-field effect devices, using a process that is optimized for production of MOSFET and/or CMOS devices, without significantly adding to or modifying the basic manufacturing process flow or manufacturing steps for such field effect devices.